FINAL PROGRAM

Day 1 - Thursday, October 6, 2005

  8:30 Opening Remarks

        General Chair: Lizy John, University of Texas at Austin

        Program Chair: David Kaeli, Northeastern University

  8:35 – 9:30    Keynote 1: John Mashey, Techviser  

·         Summarizing Performance is No Mean Feat

  9:30 – 10:30   Session 1: Phase Behavior   

                                (Chair: Ravi Nair, IBM)

      ·        Exploiting Program Microarchitecture Independent Characteristics and Phase Behavior for Reduced Benchmark Suite Simulation

      Lieven Eeckhout, Ghent University , John Sampson, UCSD and Brad Calder, UCSD

·        Detecting Recurrent Phase Behavior under Real-System Variability

      Canturk Isci and Margaret Martonosi, Princeton University

  10:30 - 11:00     Break

  11:00 - 12:00    Session 2: Multimedia Workloads

                                  (Chair: Jeff Reilly, Intel)

·         A Performance Characterization of High Definition Digital Video Decoding Using H.264/AVC

Mauricio Alvarez, Esther Salami, Alex Ramirez, Mateo Valero, UPC

·         The ALPBench Benchmark Suite for Multimedia Applications

Manlap Li, Ruchira Sasanka, and Sarita Adve, UIUC, Yen-kuang Chen and Eric Debes, Intel

12:00 - 1:30    Lunch

1:30 - 3:00    Session 3: Traces and Workload Analysis  

                            (Chair: John Kalamatianos, AMD)

      ·         Reducing Overheads for Acquiring Dynamic Memory Traces

Xiaofeng Gao, Michael Laurenzano, Beth Simon, and Allan Snavely, San Diego Supercomputer Center

·         Accurate Statistical Approaches for Generating Representative Workload Compositions

Lieven Eeckhout, Ghent University, Rashmi Sundareswara, University of Minnesota, Joshua J. Yi, Freescale, David J. Lilja, University of Minnesota, Paul Schrater, University of Minnesota

·         A multi-level comparative performance characterization of SPECjbb2005 versus SPECjbb2000

Ricardo Morin, Anil Kumar, and Elena Ilyina, Intel Corporation

3:00 - 3:30     Break          

3:30 - 5:00     Session 4: Bioinformatics Workloads

                             (Chair: Joydeep Ray, AMD)

·         Workload Characterization of Biometrics Applications on Pentium 4 Microarchitecture

Chang-Burm Cho, Asmita V. Chande, Yue Li and Tao Li, University of Florida

·         Characterization and Analysis of HMMER and SVM-RFE Parallel Bioinformatics Applications

Uma Srinivasan, Peng-Sheng Chen, Qian Diao, Chu-Cheow Lim, Eric Li, Yongjian Chen, Roy Ju, Yimin Zhang, Intel Corporation

·         Parallel Processing in Biological Sequence Comparison using General Purpose Processors

Friman Sanchez, Esther Salami, Alex Ramirez, and Mateo Valero, UPC

Day 2 - Friday, October 7, 2005

   8:30 - 9:30     Keynote 2: Zarka Cvetanovic, HP 

      ·         Visualization Techniques for System Performance Characterization

  9:30 - 10:30     Session 5: Power Analysis and JVM Workloads  

                                 (Chair: Jim Bondi, Texas Instruments)

      ·   Efficient Power Analysis using Synthetic Testcases

Robert H. Bell, Jr. IBM and Lizy K. John, University of Texas at Austin

•  Study of Java Virtual Machine Scalability Issues on SMP Systems

Zhongbo Cao, Wei Huang, and J. Morris Chang, Iowa St.

10:30 - 11:00     Break
11:00 - 12:00     Session 6: Server and High Performance Workloads  

                                 (Chair: Linix Zhang, IBM)

·         Workload Characterization for the Design of Future Servers

Bill Maron, Thomas Chen, Duc Vianney, Bret Olszewski, and Steve Kunkel, Alex Mericas, IBM Corp.

·         Understanding the Causes of Performance Variability in HPC Workloads

David Skinner and William Kramer, NERSC/LBL

 12:00 - 1:30     Lunch
 1:30 - 3:30     Session 7: Special Benchmark Session  

                              (Chair: John Shen, Intel)

·         The FeasNewt Benchmark

Todd Munson and Paul Hovland, Argonne National Labs

·         Comprehensive Throughput Evaluation of LANs in Clusters of PCs with Switchbencharch

Felix Rauch, National ICT, Australia

·         BioPerf: A Benchmark Suite to Evaluate High-Performance Computer Architecture on Bioinformatics Applications

David Bader, Georgia Institute of Technology, Yue Li, University of Florida , Tao Li, University of Florida , Vipin Sachdeva, University of New Mexico

·         A Portable, Open-Source Implementation of the SPC-1 Workload

Stephen Daniel, Rickard Faith, Network Applicance

  3:30 - 4:00     Break
  4:00 - 5:30     Session 8: Network Workloads And Network Processors  

                               (Chair: Alan MacKay, IBM)

·         Understanding Ultra-Scale Application Communication Requirements

Shoaib Kamil, John Shalf, Leonid Oliker, and David Skinner, LBL

·         Characterizing Sources and Remedies for Packet Loss in Network Intrusion Detection Systems

Lambert Schaelicke, Intel, J. Curt Freeland, Notre Dame University

·         Toward an Accurate Evaluation of Sensor Network Processors

Leyla Nazhandali, Michael Minuth, and Todd Austin, University of Michigan

  5:30     Closing Comments

Day 3 - Saturday, October 8, 2005

   8:00 - 12:00    Workshop

IOSCA : Workshop on interaction between operating system and computer architecture 

organized by Prof. Tao Li, Univ. of Florida

                            Advance Program        

12:00 - 1:15     LUNCH

1:15 - 3:15     Tutorial I:  AMD’s "SimNow" Simulator, by Brian Barnes and John Slice

3:30 - 5:30    Tutorial II: Power5 Performance Measurement & Characterization, BY ALEX MERICAS, IBM

Keynote I

 "Summarizing Performance is No Mean Feat"

John R. Mashey

 Abstract: For decades, computer benchmarkers have fought a War of Means, arguing over proper uses of Arithmetic, Harmonic, and  Geometric Means, starting in the mid-1980s.  One would think this basic issue of computer performance analysis would have been long resolved, but contradictions are still present in some excellent and widely-used textbooks.

 This talk offers a framework that resolves these issues and includes both workload analyses and relative performance analyses (such as SPEC or Livermore Loops), emphasizing differences between algebraic and statistical approaches. In some cases, the lognormal distribution is found to be quite useful, especially with appropriate forms of standard deviation and confidence interval used to augment the usual Geometric Mean.  Results can be used to indicate the relative importance of careful workload analysis.

      Bio:

Dr John R. Mashey is a consultant for venture capitalists and technology companies, but has been involved off-and-on in computer performance analysis for 35 years.  He is "an ancient UNIX person," having started work on it at Bell Labs in 1973, and continuing to work there for 10 years, including design of the UNIX per-process accounting software.  He moved to Silicon Valley in 1983 to join Convergent Technologies, ending as director of software. Mashey joined

MIPS Computer Systems in early 1985, managing operating systems development, and helping design the MIPS RISC architecture, as well as specific CPUs, systems and software. He continued similar work at SGI (1992 - 2000) most recently contributing to the design of SGI's NUMAflex modular computer architecture, ending as VP and Chief Scientist.

Mashey was one of the founders of the SPEC benchmarking group, was an ACM National Lecturer for four years, has been guest editor for IEEE Micro, and one of the long-time organizers of the Hot Chips conferences. Additionally, he has chaired technical conferences on operating systems and CPU chips, and has given more than 500 public talks on software engineering, RISC design, performance benchmarking and supercomputing. He is a Trustee of the Computer History Museum . He holds a Ph.D. in Computer Science from Pennsylvania State University .

Keynote II

 "Visualization Techniques for System Performance Characterization"

Zarka Cvetanovic

 Abstract: As computer environments increase in size and complexity, it is becoming more challenging to analyze and identify factors that limit performance and scalability. Application developers and system administrators need easy-to-use tools that will enable them to quickly identify system bottlenecks and configure system for best performance. In this talk, we will present techniques that allow users to view the load on all major system components simultaneously, with negligible overhead, and no changes in the application. We include several case studies where such techniques have been used to characterize and improve performance of applications, system software, and future CPU/platform designs.

Bio:  

Zarka Cvetanovic has worked in the product development engineering organizations in Hewlett-Packard Corporation, Compaq Computer, and Digital Equipment over the past 20 years. She has led efforts in definition, modeling, and performance characterization of several generations of successful VAX and Alpha server products. She is currently working on performance of large-scale Linux clusters in the Hewlett-Packard's High Performance Computing division. She has numerous publications in the area of system and workload characterization. Zarka holds a Ph.D. in Computer and Electrical Engineering from the University of Massachusetts, Amherst.

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