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IISWC-2005 October 6-8, 2005 Crowne Plaza Austin Hotel Austin, Texas |
Tutorials ( Day 3 - Saturday, October 8, 2005 )
1:15
– 3:15 Tutorial I: AMD’s "SimNow"
Simulator,
SimNow: A Fast and Functionally Accurate AMD X86-64 System Simulator
Introduction
SimNow Overview
A. Dynamic translation
B. 1 IPC timing model.
C. Hosted on Windows64 and Linux64
Goals
A. Performance target of 10x real hardware.
B. Software being simulated does not require any modifications and is not
aware that it is being simulated.
C. Should run on standard AMD64 based desktop/laptop systems with no
special hardware required.
D. Enhanced visibility into system operation – more than would be available
on hardware systems.
E. System consistency checking.
What Makes SimNow Different?
Speed
Capable of simulating a range of systems from a simple single-chip design to a full
multi-processor PC
Capable of simulating multiple PC systems at the same time.
Implemented totally in software, no special hardware required
How does SimNow Continue to Grow?
Internal groups and partners add to device libraries and features which
are then reviewed and then made available to all partners
How is SimNow Used internally and by current partners?
Used internally for trace and event collection to feed into timing accurate simulators, as
well as to verify accuracy of retired instruction.
Used internally to evaluate new instruction architectures.
OS developer testing new chip features
BIOS developer testing
Software Product testing
Hardware device modeling
What is available in the Public Release of SimNow?
Analyzer SDK
1P 1Core and 1P 2core Platforms and Bios (with
Ready for user installation of operating system of choice
Device SDK not included.
Limited platform configuration capability.
What if I am a AMD partner and want to do device Modeling or want
to model other platforms?
Need to request and sign a full SimNow license agreement
Demo
3:30
– 5:30
Tutorial II: Power5
Performance Measurement & Characterization, by Alex Mericas, IBM
POWER5 Performance Measurement and Characterization
IBM's POWER5 is a dual core, Simultaneous Multithreaded (SMT) , superscalar processor using agressive speculation and out of order execution. Like most modern processors it has built-in Performance Monitoring capability to provide insight into hardware performance and to help tune software for optimum efficiency. This tutorial will provide an overview of the hardware facilities available on the POWER5 and the software tools to exploit those facilities.
Alex Mericas is a Senior Technical Staff Member in IBM's Systems Technology Group. Alex designed the Hardware Instrumentation on the POWER4, POWER5, and PowerPC970 processors.
This website is maintained by IISWC 2005 Committee.
Contact Byeong Kil Lee, if you have any questions.