IISWC-2010

December 2-4, 2010

 Atlanta, GA, USA



PROGRAM

 

Day 1

December 2 (Thursday)

   8:00  -  8:15am     Opening remarks
   8:15  -  9:30am     Keynote:
Title: Cloud and Utility Computing and its Implications for Large-scale Datacenters
                                                  Prof. Karsten Schwan (Georgia Institute of Technology)

   9:30  -10:00am     Break
 10:00  -11:30am     Session 1: Transactional Memory

 11:30  -  1:00pm     Lunch
   1:00  -  3:00pm     Session 2:GPU
   3:00  -  3:30pm     Break
   3:30  -  5:30pm     Session 3: Characterization and Benchmark Synthesis

   6:30  -  8:00pm     Banquet 

Day 2

December 3 (Friday)

   8:00  -10:00am     Session 4: Parallelism
 10:00  -10:30am     Break
 10:30  -12:00am     Session 5: Virtualization and Cloud
 12:00  -  1:00pm     Lunch

   1:00  -  2:30pm     Session 6: Power, Network, and Multi-threading/Multicore

   2:30  -  3:30pm     Session 7: Poster Presentation
   3:30  -  4:00pm     Break

   4:00  -  5:00pm     Panel Discussion: "What workload will run on heterogeneous multi-core systems, and

                                 how will heterogeneous multi-core systems affect future workloads?
   5:00  -  5:30pm     Award

Day 3

December 4 (Saturday)

    Tutorials

  • Tutorial I:   (Full-day session)   

     

  • Tutorial II:  (Half-day session - morning) 

    • Cloud Benchmarks and Workloads (by Gatech)

 

 

 

Day 1 -  Thursday, December 2, 2010

 

 8:00  - 8:15am     Opening remarks
 8:15  - 9:30am     Keynote:  
Title: Cloud and Utility Computing and its Implications for Large-scale Datacenters
                                                       Prof. Karsten Schwan (Georgia Institute of Technology)


 9:30  -  10:00am    Break

 

10:00 - 11:30   Session 1: Transactional Memory

●    Analysis on Semantical Transactional Memory Footprint for Hardware Transactional Memory, Jaewoong Chung (AMD), Dhruva Chakrabarti (HP), and Chi Cao Minh

●    Real Java Applications on Software Transactional Memory, Takuya Nakaike, Rei Odaira, Toshio Nakatani, and Maged M. Michael (IBM Research -Tokyo)

●    EigenBench: A Simple Exploration Tool for Orthogonal TM Characteristics, Sungpack Hong, Tayo Oguntebi, Jared Casper, Nathan Bronson, Christos Kozyrakis, and Kunle Olukotun (Stanford U)

 

11:30 - 1:00     Lunch

1:00 - 3:00       Session 2: GPU

●    Exploring GPGPU Workloads: Characterization Methodology, Analysis and Microarchitecture Evaluation Implication, Nilanjan Goswami, Ramkumar Shankar, Madhura Joshi, and Tao Li (U of Florida)

●    A Characterization of the Rodinia Benchmark Suite with Comparison to Contemporary CMP Workloads, Shuai Che, Jeremy W. Sheaffer, Michael Boyer, Lukasz G. Szafaryn, Liang Wang, and Kevin Skadron (U of Virginia)

●    Data Handling Inefficiencies between CUDA, 3D Rendering, and System Memory, Brian Gordon, Sohum Sohoni, and Damon Chandler (Oklahoma State U)

●    Parallelization and Characterization of GARCH Option Pricing on GPUs, Ren-Shuo Liu, Yun-Cheng Tsai, and Chia-Lin Yang (National Taiwan U)

 

3:00 - 3:30       Break

3:30 - 5:30       Session 3: Characterization and Benchmark Synthesis

●    Characterization of Workload and Resource Consumption for an Online Travel and Booking Site, Nicolas Poggi, David Carrera, Ricard Gavaldà, Jordi Torres, and Eduard Ayguadé (Technical U of Catalonia)

●    Characterizing the Datasets for Data Deduplication in Backup Applications, Nohhyun Park, and David J. Lilja (U of Minnesota)

●    Performance Characterization and Acceleration of Optical Character Recognition on Handheld Platforms, Sadagopan Srinivasan, Li Zhao, Lin Sun, Zhen Fang, Peng Li, Tao Wang, Ravishankar Iyer, and Dong Liu (Intel)

●    Benchmark Synthesis for Architecture and Compiler Exploration, Luk Van Ertvelde, and Lieven Eeckhout (Ghent U)

 

6:30  - 8:00      Banquet

 

 

Day 2 -  Friday, December 3, 2010

 

8:00 - 10:00     Session 4: Parallelism

    Toward a More Accurate Understanding of the Limits of the TLS Execution Paradigm, Nikolas Ioannou (U of Edinburgh), Jeremy Singer (U of Manchester), Salman Khan (U of Edinburgh), Polychronis Xekalakis (Intel Barcelona Research), Paraskevas Yiapanis, Adam Pocock, Gavin Brown, Mikel Lujan, Ian Watson (U of Manchester), and Marcelo Cintra (U of Edinburgh)

    A Limit Study of JavaScript Parallelism, Emily Fortuna, Owen Anderson, Luis Ceze, and Susan Eggers (U of Washington)

    Fidelity and Scaling of the PARSEC Benchmark Inputs, Christian Bienia, and Kai Li (Princeton U)

    Exploiting Approximate Value Locality for Data Synchronization on Multicore Processors, Jaswanth Sreeram, and Santosh Pande (Georgia Institute of Technology)

 

10:00 - 10:30   Break

10:30 - 12:00   Session 5: Virtualization and Cloud

    Improving Virtualization Performance and Scalability with Advanced Hardware Accelerations, Yaozu Dong, Xudong Zheng, Xiantao Zhang, Jinquan Dai, Jianhui Li, Xin Li (Intel), and Haibing Guan (Shanghai Jiaotong U)

    Tackling the Challenges of Server Consolidation on Multi-core Systems, Hui Lv, Xudong Zheng, Zhiteng Huang, and Jianggang Duan (Intel)

    Study of Performance Variation using Open-Source Cloud Platforms, Yohei Ueda, and Toshio Nakatani (IBM Research)

 

12:00 - 1:00     Lunch

1:00 - 2:30       Session 6: Power, Network, and Multi-threading/Multicore

    Runtime Workload Behavior Prediction Using Statistical Metric Modeling with Application to Dynamic Power Management, Canturk Isci, Ruhi Sarikaya, and Alper Buyuktosunoglu (IBM)

    Analyzing and Scaling Parallelism for Network Routing Protocols, Abhishek Dhanotia, Sabina Grover, and Greg Byrd (NC State U)

    Performance of Multi-Process and Multi-Thread Processing on Multi-core SMT Processors, Hiroshi Inoue, and Toshio Nakatani (IBM Research)

 

2:30 - 3:30       Session 7: Poster Presentation

    A Comprehensive Analysis and Parallelization of an Image Retrieval Algorithm, Zhenman Fang, Weihua Zhang, Haibo Chen, and Binyu Zang (Fudan U)

    Performance Characterization of Very Large Last Level Caches, Parijat Dube, Michael Tsao, Li Zhang, and Alan Bivens (IBM Research)

    Energy-Delay Characterization of Online Services Applications for Optimal Datacenter Provisioning, Sriram Sankar, Kushagra Vaid, and Harry Rogers (Microsoft)

    Black-box Characterization of Processor Workloads for Engineering Applications, Nima Namaki, and Andreas de Blanche (U West)

    AdaBoost Algorithm with Haar Feature on General-Purpose Many-Core Chip Multiprocessors, Wenlong Li, Eric Li, and Victor Lee (Intel)

 

3:30 - 4:00       Break

4:00 - 5:00       Panel discussion on “What workload will run on heterogeneous multi-core systems, and how will heterogeneous multi-core systems affect future workloads?

 

5:00 - 5:30       Award

 

 

Day 3 -  Saturday, December 4, 2010


 

Keynote