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IISWC-2009 October 4th-6th, 2009 Austin, TX, USA |
PROGRAM
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October 4 (Sunday) |
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Lunch (12:15pm - 1:45pm)
*Reception (6pm-8pm, AT&T Conference Center) |
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October 5 (Monday) |
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8:00 -
8:15am Opening remarks 12:00 -
1:30pm Lunch 6:30 - Banquet (AT&T Conference Center)
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October 6 (Tuesday) |
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8:00 -10:00am
Session 4:
Mobile and Storage 1:30 - 2:30pm Panel Discussion: "What’s the new “General Purpose?"
- -Panelists: Leslie Barnes (AMD), Paolo Faraboschi (HP Lab), Yale Patt (UT-Austin) and JoAnn Paul (Virginia Tech)
2:30 - 3:00pm Break
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Day 1 - Sunday, October 4, 2009
Tutorial I Statistics in Workload Characterization and Benchmarking (David Lilja, University of Monnesota and Lieven Eeckhout, Ghent University)
Tutorial II ProtoFlex: An Architectural Exploration Vehicle using FPGA-Accelerated, Full-System Multiprocessor Simulation (Eric Chung and Michale K. Papamichael, CMU)
Day 2 - Monday, October 5, 2009
8:00 - 8:15am Opening remarks
8:15 - 9:15am
Keynote:
Green Clouds and Black Swans in the Exascale Era (Partha
Ranganathan, HP Lab)
9:15 - 9:45am Break
9:45 -11:45am
Session 1: Multi-/Manycore
A Characterization and Analysis of PTX Kernels, Gregory Diamos (Georgia Institute of Technology), Andrew Kerr (Georgia Institute of Technology), Sudhakar Yalamanchili (Georgia Institute of Technology) [slide]
Workload Characterization and Optimization of Text Indexing on the Cell Processor, Daniele P. Scarpazza (IBM T.J. Watson Research Center), Gordon W. Braudaway (IBM T.J. Watson Research Center)
High-Speed Network Modeling For Full System Simulation, Diego Lugones (Universitat Autònoma of Barcelona), Emilio Luque (Universitat Autònoma of Barcelona), Daniel Franco (Universitat Autònoma of Barcelona), Eduardo Argollo (HP Labs- Exascale Computing Lab), Paolo Faraboschi (HP Labs- Exascale Computing Lab), Dolores Rexachs (Universitat Autònoma of Barcelona), Juan Carlos Moure (Universitat Autònoma of Barcelona), Ayose Falcòn (HP Labs- Exascale Computing Lab), Daniel Ortega (HP Labs- Exascale Computing Lab)
Logicalization of Communication Traces from Parallel Execution, Qiang Xu (University of Houston), Jaspal Subhlok (University of Houston), Sara Voss (Coe College, Iowa), Rong Zheng (University of Houston)
12:00 -1:30pm Lunch
1:30 -
3.30pm
Session 2: Benchmark Suite Construction
Rodinia: A Benchmark Suite for Heterogeneous Computing, Shuai Che (University of Virginia), Michael Boyer (University of Virginia), Jiayuan Meng (University of Virginia), David Tarjan (University of Virginia), Sang-Ha Lee (University of Virginia), Jeremy Sheaffer (University of Virginia), Kevin Skadron (University of Virginia)
VBS: Vision Benchmark Suite, Sravanthi Kota Venkata (University of California, San Diego), IkkJin Ahn (Google Corportation, CA), Donghwan Jeon (University of California, San Diego), Anshuman Gupta (University of California, San Diego), Michael Taylor (University of California, San Diego)
GBLOT: A Generator of BLOgosphere Traffic, Mariela Curiel (Universidad Simón Bolívar, Venezuela), David de Sousa (Universidad Simón Bolívar, Venezuela), Rodrigo Weffer (Universidad Simón Bolívar, Venezuela), Jussara Almeida (Universidad Federal de Minas Gerais, Brasil), Virgilio Almeida (Universidad Federal de Minas Gerais, Brasil)
The Importance of Accurate Task Arrival Characterization in the Design of Processing Cores, Hashem H. Najaf-abadi (NC State University), Eric Rotenberg (NC State University)
3:30 - 4:00pm Break
4:00 -
6:00pm Session 3:
Benchmark Characterization
A Communication Characterization of SPLASH-2 and Parsec, Nick Barrow-Williams (University of Cambridge), Christian Fensch (University of Cambridge), Simon Moore (University of Cambridge)
Understanding PARSEC Performance on Contemporary CMPs, Major Bhadauria (Cornell University), Vincent M. Weaver (Cornell University), Sally A. McKee (Chalmers Univ. of Technology)
On the (Dis)similarity of Transactional Memory Workloads, Clay Hughes (University of Florida), James Poe (University of Florida), Amer Qouneh (University of Florida), Tao Li (University of Florida)
Experimental Evaluation of N-tier Systems: Observation and Analysis of Multiple-Resource Bottlenecks, Simon Malkowski (Georgia Institute of Technology), Calton Pu (Georgia Institute of Technology)
6:30 - Banquet
Day 3 - Tuesday, October 6, 2009
8:00
-10:00am
Session 4: Mobile and Storage
Performance Characterization and Optimization of Mobile Augmented Reality on Handheld Platforms, Sadagopan Srinivasan (Intel), Zhen Fang (Intel), Ravi Iyer (Intel), Steven Zhang (Intel), Mike Espig (Intel), Don Newell (Intel)
Image Feature Extraction for Mobile Processors, Mark Murphy (University of California, Berkeley), Hong Wang (Intel), Kurt Keutzer (University of California, Berkeley)
Storage Characterization for Unstructured Data in Online Services Applications, Sriram Sankar (Microsoft Corporation), Kushagra Vaid (Microsoft Corporation)
Evaluation of disk-level workloads at different time scales, Alma Riska (Seagate), Erik Riedel (Seagate)
10:00 - 10:30pm
Break
10:30 -
12:00pm
Session 5: Performance Characterization
Performance Characterization and Cache-Aware Core Scheduling in a Virtualized Multi-Core Server under 10GbE, Danhua Guo (University of California Riverside), Guangdeng Liao (University of California Riverside), Laxmi Bhuyan (University of California Riverside)
Characterization of DBT Overhead, Edson Borin (Intel Corporation), Youfeng Wu (Intel Corporation)
Evaluation of the Intel(R) Core(TM) i7 Turbo Boost feature, Preet Jassi (Simon Fraser University, Burnaby, Canada), Ananth Narayan S. (Simon Fraser University, Burnaby, Canada), James Charles (Simon Fraser University, Burnaby, Canada), Abbas Sadat (Simon Fraser University, Burnaby, Canada), Alexandra Fedorova (Simon Fraser University, Burnaby, Canada)
12:00 - 1:30pm Lunch
1:30 - 2:30pm Panel
discussion:
Panelists: Leslie Barnes (AMD), Paolo Faraboschi (HP Lab), Yale Patt (UT-Austin) and JoAnn Paul (Virginia Tech)
2:30 - 3:00pm
Break
3:00 -
5:00pm
Session 6: Web and Internet
Phoenix Rebirth: Scalable MapReduce on a Large-Scale Shared-Memory System, Richard Yoo (Stanford University), Anthony Romano (Stanford University), Christos Kozyrakis (Stanford University)
Browser Workload Characterization for an Ajax-based Commercial Online Service, Shu Xu (Intel China Software Center), Bo Huang (Intel China Software Center), Junyong Ding (Intel China Software Center), Jinquan Dai (Intel China Software Center)
Analyzing and Improving Performance Scalability of Commercial Server Workloads on a Chip Multiprocessor, Kazuaki Ishizaki (IBM Research), Shahrokh Daijavad (IBM Research), Toshio Nakatani (IBM Research)
Understanding the applicability of chip multiprocessor performance optimizations on data mining applications, Kelly A. Shaw (University of Richmond), Ivan Jibaja (University of Richmond)
5:00 - 5:30pm Closing remarks
Title: Green Clouds and Black Swans in the Exascale Era
Abstract: The petascale milestone is behind us,
and the next grand challenge is to design systems and datacenters for the
exascale era (10^18 flops). This talk will speculate on challenges and
opportunities in understanding and characterizing workloads in the exascale
era, with particular emphasis on potential "black swan events*".
(
http://en.wikipedia.org/wiki/Black_swan_theory )
Biography: Partha Ranganathan is currently a distinguished technologist at Hewlett Packard Labs. His research interests are in systems architecture and manageability, energy-efficiency, and systems modeling and evaluation. He is currently the principal investigator for the exascale datacenter project at HP Labs that seeks to design next-generation servers and datacenters and their management. He was a primary developer of the publicly distributed Rice Simulator for ILP Multiprocessors (RSIM). Partha received his B.Tech degree from the Indian Institute of Technology, Madras and his M.S. and Ph.D. from Rice University, Houston. Partha's work has been featured in various venues including the Wall Street Journal, Business Week, San Francisco Chronicle, Times of India, slashdot, youtube, and Tom's hardware guide. Partha has been named one of the world's top young innovators by MIT Technology Review, and is a recipient of Rice University's Outstanding Young Engineering Alumni award.